.BondLib.Electrical.Analog.Spice.RampingSources .BondLib.Electrical.Analog.Spice.RampingSourcesAmong circuit analysts, a technique has been developed to circumvent these difficulties, called ramping [1]. One OP-point that can always be computed easily is the one where all sources are set equal to zero. In that case, all node potentials must evidently be zero as well. Thus, rather than working with the regular startTime and offset parameters of Modelica sources, it may make sense to start always from zero, ramp all sources up to their offset during the rampTime, then wait with the actual analysis during a period, called settleTime.
Thus in Spice ramping sources, the startTime parameter of regular Modelica sources is replaced by two parameters: rampTime and settleTime. To prevent numerical problems, the phase parameter of the sinusoidal sources has also been removed. If a sine wave signal is supposed to be off by a certain fraction of a period from another, you need to adjust the settleTime of one of them accordingly.
For example, a ramping trapezoidal voltage source with the parameters:
produces the following voltage characteristic:
References:
| Name | Description |
|---|---|
 V | Constant voltage ramping source for Spice |
 sinV | Sinusoidal voltage ramping source for Spice |
 expsinV | Damped sinusoidal voltage ramping source for Spice |
 expV | Step response voltage ramping source for Spice |
 trapV | Trapezoidal voltage ramping source for Spice |
 I | Constant current ramping source for Spice |
 sinI | Sinusoidal current ramping source for Spice |
 expsinI | Damped sinusoidal current ramping source for Spice |
 expI | Step response current ramping source for Spice |
 trapI | Trapezoidal current ramping source for Spice |