Block that generates a true output when toggle
input u rises from false to
true, provided that the clear input clr
is false or also became at the same time
false. The output remains true until
u rises from false
to true again, orclr rises from false
to true.If the clear input clr is true, the
output y switches to false (if it was
true) and it remains false, regardless of
the value of the toggle input u.
At initial time, if clr = false, then the output
will be y = u. Otherwise it will be
y=false (because the clear input clr is
true).

pre_y_start, and made the
initial output to be equal to toggle input when the clear input is
false.