.IndustrialControlSystems.Logical.Timers.Timer_On_Redge

Information

Description

The timer is actived when the set signal ( S ) becomes true (on the rising edge of S ).
The output ( Q ) of the timer rises up when S becomes true and remains high for PV seconds.
If the Set signal become false while counting, the timer does not stop.
If the reset signal ( R ) becomes true (a rising edge is detected) the output becomes false and the timer stops.

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Revisions

First release of the Industrial Control Systems: April-May 2012
List of revisions:

Main Authors:
Marco Bonvini; <bonvini@elet.polimi.it>
Alberto Leva <leva@elet.polimi.it>
Politecnico di Milano
Dipartimento di Elettronica e Informazione
Via Ponzio 34/5
20133 Milano - ITALIA -
Copyright:
Copyright © 2010-2012, Marco Bonvini and Alberto Leva.
The IndustrialControlSystems package is free software; it can be redistributed and/or modified under the terms of the Modelica license, see the license conditions and the accompanying disclaimer in the documentation of package Modelica in file "Modelica/package.mo".

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