.IndustrialControlSystems.Logical.Timers.Timer_On_Redge

Information

Description

The timer is actived when the set signal ( S ) becomes true (on the rising edge of S ).
The output ( Q ) of the timer rises up when S becomes true and remains high for PV seconds.
If the Set signal become false while counting, the timer does not stop.
If the reset signal ( R ) becomes true (a rising edge is detected) the output becomes false and the timer stops.

Images show:

Output Q,
Set S and Reset R signals,
and the remaining time tr

Revisions

First release of the Industrial Control Systems: April-May 2012