modelOpAmpDetailed

Detailed model of an operational amplifier

Information

The OpAmpDetailed model is a general operational amplifier model. The emphasis is on separating each important data sheet parameter into a sub-circuit independent of the other parameters. The model is broken down into five functional stages input, frequency response, gain, slew rate and an output stage. Each stage contains data sheet parameters to be modeled. This partitioning and the modelling of the separate submodels are based on the description in [Conelly1992].

Using [Conelly1992] Joachim Haase (Fraunhofer Institute for Integrated Circuits, Design Automation Division) transferred 2001 operational amplifier models into VHDL-AMS. Now one of these models, the model "amp(macro)" was transferred into Modelica.

Parameters

TypeNameDefaultDescription
SI.ResistanceRdm2.0e6Input resistance (differential input mode)
SI.ResistanceRcm2.0e9Input resistance (common mode)
SI.CapacitanceCin1.4e-12Input capacitance
SI.VoltageVos1.0e-3Input offset voltage
SI.CurrentIb80.0e-9Input bias current
SI.CurrentIos20.0e-9Input offset current
SI.Voltagevcp0.0Correction value for limiting by p_supply
SI.Voltagevcm0.0Correction value for limiting by msupply
RealAvd0106.0Differential amplifier [dB]
RealCMRR90.0Common-mode rejection [dB]
SI.Frequencyfp15.0Dominant pole
SI.Frequencyfp22.0e6Pole frequency
SI.Frequencyfp320.0e6Pole frequency
SI.Frequencyfp4100.0e6Pole frequency
SI.Frequencyfz5.0e6Zero frequency
SI.VoltageSlopesr_p0.5e6Slew rate for increase
SI.VoltageSlopesr_m0.5e6Slew rate for decrease
SI.ResistanceRout75.0Output resistance
SI.CurrentImaxso25.0e-3Maximal output current (source current)
SI.CurrentImaxsi25.0e-3Maximal output current (sink current)
SI.TimeTs0.0000012Sampling time
SI.Voltagevcp_absabs(vcp)Positive correction value for limiting by p_supply
SI.Voltagevcm_absabs(vcm)Positive correction value for limiting by msupply
SI.CurrentI1Ib + Ios/2.0Current of internal source I1
SI.CurrentI2Ib - Ios/2.0Current of internal source I2
RealAvd0_val10.0^(Avd0/20.0)Differential mode gain
RealAvcm_val(Avd0_val/(10.0^(CMRR/20.0)))/2.0Common mode gain
SI.VoltageSlopesr_p_valabs(sr_p)Value of slew rate for increase
SI.VoltageSlopesr_m_val-abs(sr_m)Negative value of slew rate for increase
SI.CurrentImaxso_valabs(Imaxso)Orientation out outp
SI.CurrentImaxsi_valabs(Imaxsi)Orientation into outp

Connectors

TypeNameDefaultDescription
Modelica.Electrical.Analog.Interfaces.PositivePinpPositive pin of the input port
Modelica.Electrical.Analog.Interfaces.NegativePinmNegative pin of the input port
Modelica.Electrical.Analog.Interfaces.PositivePinoutpOutput pin
Modelica.Electrical.Analog.Interfaces.PositivePinp_supplyPositive output voltage limitation
Modelica.Electrical.Analog.Interfaces.NegativePinm_supplyNegative output voltage limitation

Components

TypeNameDefaultDescription
SI.Voltagev_pos
SI.Voltagev_neg
SI.Voltagev_vos
SI.Voltagev_3
SI.Voltagev_in
SI.Voltagev_4
SI.Currenti_vos
SI.Currenti_3
SI.Currenti_r2
SI.Currenti_c3
SI.Currenti_4
Realq_fr1
Realq_fr2
Realq_fr3
SI.Voltageq_sum
SI.Voltageq_sum_help
SI.Voltageq_fp1
SI.Voltagev_source
SI.VoltagexAuxiliary variable for slew rate
SI.Voltagev_out
SI.Currenti_out

Contents

NameDescription
FCNiout_limitInternal limitation function
FCNq_sum_limitInternal limitation function

Revisions

June 17, 2009
by Susann Wolf initially implemented