modelRS

Unclocked RS FlipFlop

Information

RS is a basic component for e.g., the RS (set-reset) flipflop, which is built up by Nor gates according to the schematic. To avoid a numerical loop a small transport delay is inserted which delay time is a parameter of the RS component. Also its initial value can be set by parameter.

Parameters

TypeNameDefaultDescription
SI.TimedelayTime0Delay time
D.Interfaces.Logicq0L.'U'Initial value of output

Connectors

TypeNameDefaultDescription
D.Interfaces.DigitalInputs
D.Interfaces.DigitalInputr
D.Interfaces.DigitalOutputq
D.Interfaces.DigitalOutputqn

Components

TypeNameDefaultDescription
D.Basic.NorNor1
D.Basic.NorNor2
D.Delay.TransportDelayTD1