.OpenIPSL.Electrical.Renewables.PSSE.ElectricalController.BaseClasses.CurrentLimitLogicREECA

Current limit logic for REECA

Information

The pseudo-code for the current limit logic in the REECA electrical controller detailed below:

Ipre = sqrt(Imax) - sqrt(abs(Ipcmd));

if Ipre is less than 0:
   Ipost = 0;
else:
   Ipost = sqrt(Ipre);

if Pqflag = true:
   Ipmax = min(VDL2_out, Imax);
   Ipmin = 0;
   Iqmax = min(Ipost, VDL1_out);
   Iqmin = -Iqmax;
end

if Pqflag = false:
   Ipmax = min(Ipost, VDL2_out);
   Ipmin = 0;
   Iqmax = min(VDL1_out, Imax);
   Iqmin = -Iqmax;
end

The modelling of the current limit logic for the REECA electrical controller is based on the following references:


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