modelCurrentLimitLogicREECA

Current limit logic for REECA

Information

The pseudo-code for the current limit logic in the REECA electrical controller detailed below:

Ipre = sqrt(Imax) - sqrt(abs(Ipcmd));

if Ipre is less than 0:
   Ipost = 0;
else:
   Ipost = sqrt(Ipre);

if Pqflag = true:
   Ipmax = min(VDL2_out, Imax);
   Ipmin = 0;
   Iqmax = min(Ipost, VDL1_out);
   Iqmin = -Iqmax;
end

if Pqflag = false:
   Ipmax = min(Ipost, VDL2_out);
   Ipmin = 0;
   Iqmax = min(VDL1_out, Imax);
   Iqmin = -Iqmax;
end

The modelling of the current limit logic for the REECA electrical controller is based on the following references:

Parameters

TypeNameDefaultDescription
OpenIPSL.Types.PerUnitstart_iiStarting current value from Iqcmd (comes from power flow simulation)
OpenIPSL.Types.PerUnitstart_irStarting current value from Ipcmd (comes from power flow simulation)
OpenIPSL.Types.PerUnitImaxMaximum limit on total converter current

Connectors

TypeNameDefaultDescription
Modelica.Blocks.Interfaces.RealInputVDL1_out
Modelica.Blocks.Interfaces.BooleanInputpqflag
Modelica.Blocks.Interfaces.RealInputVDL2_out
Modelica.Blocks.Interfaces.RealInputIqcmd
Modelica.Blocks.Interfaces.RealInputIpcmd
Modelica.Blocks.Interfaces.RealOutputIqmax
Modelica.Blocks.Interfaces.RealOutputIqmin
Modelica.Blocks.Interfaces.RealOutputIpmax
Modelica.Blocks.Interfaces.RealOutputIpmin

Components

TypeNameDefaultDescription
OpenIPSL.Types.PerUnitIpost
OpenIPSL.Types.PerUnitIpre