modelTransmissionLineCheck

Verification of the transmission line circuits by using time delay

Information

In this model, the verification of the TransmissionLineModelica and the TransmissionLineEquations are performed.The formula of the time delay is used for the verification of the implemented transmission line circuit models to check whether the time delay of the models satisfies the theoretical one. Time delay between the ends of a transmission line can be calculated as follows:

Therefore, using the time delay formula, input voltages of the both models are delayed by the theoretical time delay. Moreover, it is checked whether the output voltages of the transmission line circuit models are matching with the delayed input voltages.

The parameters for the TransmissionLineCheck are:

Parameters Comment
N number of segments
L length of the transmission line
res resistance per meter
cap capacitance per meter
ind inductance per meter
RL load resistance
w cut-off frequency
TD time delay of the transmission line
v velocity of the signal

Parameters

TypeNameDefaultDescription
IntegerN30number of segments
SIunits.LengthL100length of the transmission line
SIunits.Resistanceres48e-6resistance per meter
SIunits.Capacitancecap101e-12capacitance per meter
SIunits.Inductanceind253e-9inductance per meter
SIunits.ResistanceRL(ind/cap)^(1/2)load resistance
SIunits.AngularFrequencyw5e6cut-off frequency
SIunits.TimeTDL/vtime delay of the transmission line
SIunits.Velocityv1/(ind*cap)^(1/2)velocity of the signal

Components

TypeNameDefaultDescription
Models.TransmissionLineEquationstlm2
Models.TransmissionLineModelicatlm1
SIunits.Voltagevoltage_modelica
SIunits.Voltagevoltage_equations
SIunits.Voltagevoltage_modelica_delayed
SIunits.Voltagevoltage_equations_delayed