modelLVPL
Low voltage power logic
Information
Development level |
2 |
Parameters
| Type | Name | Default | Description |
|---|---|---|---|
| Real | VLVPL1 | LVPL voltage 1 (Low voltage power logic) | |
| Real | VLVPL2 | LVPL voltage 2 | |
| Real | GLVPL | LVPL gain | |
| Real | K | GLVPL/(VLVPL2 - VLVPL1) |
Connectors
| Type | Name | Default | Description |
|---|---|---|---|
| Modelica.Blocks.Interfaces.RealInput | Vt | ||
| Modelica.Blocks.Interfaces.RealOutput | LVPL |
Revisions
Copyright 2015-2016 RTE (France), SmarTS Lab (Sweden), AIA (Spain) and DTU (Denmark)
- RTE: http://www.rte-france.com
- SmarTS Lab, research group at KTH: https://www.kth.se/en
- AIA: http://www.aia.es/en/energy
- DTU: http://www.dtu.dk/english
The authors can be contacted by email: info@itesla-ipsl.org
This Source Code Form is subject to the terms of the Mozilla Public License, v. 2.0.
If a copy of the MPL was not distributed with this file, You can obtain one at http://mozilla.org/MPL/2.0.