modelRealExtractSignal
Validation model for the extract signal block
Information
Validation test for the block Buildings.Controls.OBC.CDL.Routing.RealExtractSignal.
The instance extSig has the input vector with dimension of 4 and
the extracting vector is [1, 2, 5].
Thus the output vectors is [u[1], u[2], u[5]].
The instance extSig1 has the input vector with dimension of 4 and
the extracting vector is [1, 2, 5, 3, 4, 2]. Thus the output vectors is [u[1], u[2], u[5], u[3], u[4], u[2]].
Note that when the extracting vector extract has any element with the value that
is out of range [1, nin], e.g. [1, 4] for instance in extSig.
It will issue error and the model will not translate.
Components
| Type | Name | Default | Description |
|---|---|---|---|
| Buildings.Controls.OBC.CDL.Routing.RealExtractSignal | extSig | Block that extracts signals from an input signal vector | |
| Buildings.Controls.OBC.CDL.Routing.RealExtractSignal | extSig1 | Block that extracts signals from an input signal vector | |
| Buildings.Controls.OBC.CDL.Reals.Sources.Ramp | ram | Block that outputs ramp signal | |
| Buildings.Controls.OBC.CDL.Reals.Sources.Ramp | ram1 | Block that outputs ramp signal | |
| Buildings.Controls.OBC.CDL.Reals.Sources.Ramp | ram2 | Block that outputs ramp signal | |
| Buildings.Controls.OBC.CDL.Reals.Sources.Pulse | pul | Generate pulse signal of type Real | |
| Buildings.Controls.OBC.CDL.Reals.Sources.Pulse | pul1 | Generate pulse signal of type Real |
Revisions
-
October 14, 2022, by Jianjun Hu:
Added validation when the number of outputs is more than the number of inputs. -
July 24, 2017, by Jianjun Hu:
First implementation.