.Modelica.Electrical.Digital.Examples.DLATREGSRH

Level sensitive D-Register-Bank, high active set and reset

Information

This example is a simple test of the Registers.DLATREGSRH component. The data width is set to two. After simulation plot both the dataIn and the dataOut vectors. To verify the results compare the truth table which is documented in the DLATREGSRH component.


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