.ModelicaAdditions.Blocks.Logical.NAND

Information

Logical NAND Block

The output y is false, if the first input u1 and
the second input u2 are both true.
In all other cases the output y is true.

+---------------------------------+
|     input             output    |
|                  ->             |
|   u1     u2            y        |
+---------------------------------+
|   true   true          false    |
|   true   false         true     |
|   false  true          true     |
|   false  false         true     |
+---------------------------------+

Generated at 2024-04-28T18:16:21Z by OpenModelicaOpenModelica 1.22.3 using GenerateDoc.mos