blockADconverter

Analog to digital converter (including sampler)

Extends from Interfaces.PartialSISO_equality (Partial Single Input Single Output (continuous or discrete) control block of Controller library where usually y=u if continuous block).

Information

If discrete block, the output y is sampled according to sample time sampleClock.sampleTime * sampleFactor, where sampleClock.sampleTime is defined globally in the outer component sampleClock and sampleFactor is an Integer parameter of component Sampler.

The sampled output signal is computed by limiting the input u with the provided y_min and y_max borders and by rounding according to the provided precision of the AD converter defined via parameter bits (e.g. bits = 12 is the precision of simple AD converters).

If continuous block, the output y is identical to the input u, but is limited by y_min and y_max.

Parameters

TypeNameDefaultDescription
Realy_maxUpper limit of output signal
Realy_minLower limit of output signal
IntegerbitsNumber of bits (=0 : no quantization error)
Types.BlockTypeWithGlobalDefaultblockType (from PartialSISO_equality)Modelica_LinearSystems2.Controllers.Types.BlockTypeWithGlobalDefault.UseSampleClockOptionType of block
Booleancontinuous (from PartialSISO_equality)blockType == Types.BlockTypeWithGlobalDefault.Continuous or blockType == Types.BlockTypeWithGlobalDefault.UseSampleClockOption and sampleClock.blockType == Types.BlockType.ContinuousTrue, if continuous block, otherwise discrete block
Discrete block parameters
IntegersampleFactor (from PartialSISO_equality)1Sample factor for sample time (Ts = sampleFactor * sampleClock.sampleTime)

Connectors

TypeNameDefaultDescription
Modelica.Blocks.Interfaces.RealInputu (from PartialSISO_equality)Continuous or discrete input signal of block
Modelica.Blocks.Interfaces.RealOutputy (from PartialSISO_equality)Continuous or discrete output signal of block