Delays a clocked signal for at most one period, in order to model a computational delay
This block delays a clocked Real input signal by the fraction
shiftCounter/resolution of the last interval.
There is the restriction that shiftCounter/resolution ≤ 1.
Generated at 2026-01-08T19:14:00Z
by OpenModelicaOpenModelica 1.26.0 using GenerateDoc.mos