.SMPS.PWM.DutyCycleD

A PWM modulator that implements the given duty cycle, i.e., 100*d percent of the switching period, the output signal is high, th remaining 100*(d-1) percent of the switching period, the output signal is low.
Generated at 2026-06-23T20:19:05Z by OpenModelicaOpenModelica 1.26.9 using GenerateDoc.mos