.FMITest.VirtualLoops.SRFlipFlop

Information

SR Flip Flop model that leads to a loop structure, but it is an artifical loop due to a memory element (pre)

Contents

Name	Description
Reference	Reference solution in pure Modelica
WithFMUsReference	Reference solution in pure Modelica using exactly the same structuring as in Model WithFMUs
WithFMUs	Solution with FMUs
FMUModels	For all models in this package an FMU must be generated