packageSpice
Spice-style semiconductor models
Information
This package contains Spice-style models of electronic circuit elements built in bond graph technology. The library implements facets of a dialect of HSpice, called BBSpice, further developed from HSpice at Burr Brown, Inc. in Tucson Arizona, a company that has meanwhile been acquired by Texas Instruments, Inc.
References:
- Cellier, F.E. (1991), Continuous System Modeling, Springer-Verlag, New York, Chapter 6.
- Massobrio, G. and P. Antognetti (1993), Semiconductor Device Modeling with Spice, 2nd edition, McGraw Hill, New York.
Contents
| Name | Description |
|---|---|
| Interfaces | Interfaces for Spice-style electronic circuit models |
| RS | Spice-style resistor model |
| CS | Spice-style capacitor model |
| LS | Spice-style inductor model |
| DS | Spice-style diode model used inside the bipolar transistor models |
| NPNlat | Spice-style laterally diffused NPN bipolar transistor |
| NPNvert | Spice-style vertically diffused NPN bipolar transistor |
| PNPlat | Spice-style laterally diffused PNP bipolar transistor |
| PNPvert | Spice-style vertically diffused PNP bipolar transistor |
| NMOS | Spice-style NMOS transistor in bond graph technology |
| PMOS | Spice-style PMOS transistor in bond graph technology |
| NFET | Spice-style n-channel JFET in bond graph technology |
| PFET | Spice-style p-channel JFET in bond graph technology |
| Utilities | Utility models of Spice circuit element models |